How Semiconductors Power the Modern World

Jeff Kang

Oct 20, 2025

3 min read

Updated: Aug 21

Thesis: The race is no longer about shrinking transistors. Packaging and memory bandwidth now decide who wins, and most public discussion has not caught up.

For most of my life the story of semiconductors has been told as a single number getting smaller: 14 nanometers, then 7, then 3. It is a satisfying story, and it is increasingly wrong. What actually pulled me into this topic was a single line in an article about the GPU shortage: a company had thousands of fully working processors sitting idle for months — not because the chips themselves were bad, but because there was no packaging capacity left to stack memory beside them. When I began reading about why AI accelerators are so scarce, I discovered that the constraint is rarely the transistor itself. It is the ability to connect many pieces of silicon together and feed them data fast enough. Semiconductors deserve attention not only because they underpin every modern device, but because the nature of the competition has quietly changed, and national strategies built around node size alone are aiming at the wrong target.

The core technology

*Figure 1. Silicon wafers alongside raw polysilicon chunks*

A chip begins as a purified silicon wafer onto which circuit patterns are projected by photolithography, now using extreme ultraviolet light at a 13.5 nanometer wavelength produced by vaporizing tin droplets with a laser. Dozens of deposition, etching, and doping steps build transistors layer by layer. Modern logic has moved from FinFET structures to gate-all-around nanosheets, where the gate surrounds the channel on every side to control leakage. The finished wafer is then tested, cut, and packaged. Different chips specialize: CPUs execute varied instructions with deep control logic, GPUs run thousands of simple operations in parallel, and memory stores the data both depend on.¹

¹ Reference: “How To Make A CPU” (YouTube). https://www.youtube.com/watch?v=vuvckBQ1bME

Recent developments and real problems

The AI boom exposed where the true scarcity lies. Training large models is limited less by arithmetic than by how quickly parameters can move between memory and compute. High-bandwidth memory, built by stacking DRAM dies vertically and connecting them with through-silicon vias, became the critical component, and the advanced packaging capacity needed to bond that memory beside a processor on a silicon interposer became the industry’s genuine bottleneck.

*Figure 2. Stacked structure of HBM DRAM, interposer, GPU, and package substrate*

Chiplet designs, which assemble a processor from several smaller dies, now beat monolithic designs on yield and cost. Meanwhile leading-edge lithography grows so expensive that only a handful of firms can afford it, concentrating risk in a small geographic area. A single disruption in advanced packaging or specialty chemical supply can therefore idle billions of dollars of downstream production, a fragility no amount of transistor scaling addresses.

Outlook and solutions

I expect the next decade to be defined by integration rather than miniaturization: backside power delivery, hybrid bonding, and eventually optical interconnects that move data between chips as light rather than electrical signals. Governments spending heavily on domestic fabrication should be spending proportionally on packaging, test capacity, and the specialized chemicals and equipment supply chain, which is where a single disruption would bite hardest. Standardized chiplet interfaces would also let smaller design teams compete without owning a fab, widening an industry that has become dangerously narrow. Open interfaces did exactly this for the personal computer decades ago, and there is no technical reason silicon cannot follow the same path.

Conclusion

What strikes me most is how much of semiconductor progress is now assembly rather than invention. That is not a decline; it is maturity. The insight I take away is that when a technology’s headline metric stops improving quickly, the real engineering moves somewhere less visible, and whoever notices the shift first gains years of advantage. If I enter this field, I would rather work on how chips talk to each other than on making a transistor two nanometers narrower.